1. Field of the Invention
The present invention relates generally to interposers for use in chip-scale packages (CSPs), including ball grid array (BGA) packages. Particularly, the present invention relates to interposers that include upwardly protruding dams configured to laterally confine encapsulant material over a specified area of the interposer. The invention also relates to semiconductor device packages including the interposers and to methods of fabricating the upwardly protruding dams, the interposers, and assemblies including the interposers.
2. Background of Related Art
Semiconductor devices, such as memory devices and processors, are generally fabricated in very large numbers. Typically, several semiconductor devices are fabricated on a wafer or other large scale substrate that includes a layer of semiconductor material (e.g., silicon, gallium arsenide, or indium phosphide). The semiconductor devices are then singulated, or diced, from the wafer or other large scale substrate to provide semiconductor xe2x80x9cchipsxe2x80x9d or dice.
Conventionally, semiconductor dice have been packaged for protection and to facilitate the formation of electrical connections to the small bond pads thereof. Conventional semiconductor device packages typically include an assembly of a semiconductor die and a higher level substrate board (e.g., a circuit board) or leads. Bond pads of the semiconductor die are electrically connected (e.g., by wire bonds or otherwise) to contact pads of a higher level substrate or to leads. The assembly may then be packaged. For example, assemblies that include a semiconductor die with leads connected to the bond pads thereof are typically packaged by use of transfer molding techniques to secure the leads in place and to protect the active surface of the semiconductor die and the wire bonds or other intermediate conductive elements. Assemblies including a semiconductor die and a higher level substrate may be packaged by injection molding techniques or with a glob-top type encapsulant, both of which protect the active surface of the semiconductor die and the wire bonds or other intermediate conductive elements.
Due to the ever-decreasing sizes of state of the art electronic devices, conventional semiconductor device packages are relatively bulky. As a result, alternative semiconductor device packaging configurations have been developed to reduce the amount of area, or xe2x80x9creal estatexe2x80x9d, on circuit boards consumed by semiconductor device packages.
Among these state of the art semiconductor device packages are the so-called chip-scale packages, the areas of which are substantially the same as or only slightly larger than the areas of the semiconductor dice thereof. Chip-scale packages may include a semiconductor die and an interposer superimposed over the semiconductor die. The bond pads of the semiconductor die are electrically connected to contact pads of the interposer, which are in turn electrically connected to a circuit board or other carrier substrate through traces extending to other contact elements that mate with terminals on the circuit board or other carrier substrate.
An exemplary ball grid array type chip-scale package 201 is illustrated in FIG. 1. Package 201 includes a semiconductor die 202 and an interposer 206 positioned over an active surface 203 of semiconductor die 202. Interposer 206 is secured to semiconductor die 202 with a layer 215 of adhesive material. A quantity of underfill material 216 is introduced between semiconductor die 202 and interposer 206 to fill any remaining open areas therebetween.
Interposer 206 includes a slot 207 formed therethrough. Bond pads 204 on an active surface 203 of semiconductor die 202 are exposed through slot 207. Bond pads 204 are connected by way of wire bonds 205 or other intermediate conductive elements to corresponding first contact pads 208 on interposer 206. As illustrated, wire bonds 205 extend through slot 207. Each first contact pad 208 communicates with a corresponding second contact pad 209 on interposer 206 by way of a conductive trace 210 carried by interposer 206. Second contact pads 209 may be arranged so as to reroute the output locations of bond pads 204. Thus, the locations of second contact pads 209 may also impart interposer 206 with a desired footprint, and particularly one which corresponds to the arrangement of terminal pads on a carrier substrate (not shown) to which package 201 is to be connected. Bond pads 204, wire bonds 205, and first contact pads 208 are each protected by a quantity of an encapsulant material 211, such as a glob-top type encapsulant.
Package 201 is electrically connected to a carrier substrate by way of conductive structures 213, such as solder balls, connected to second contact pads 209 and corresponding contact pads of the carrier substrate. Package 201 is configured to be connected to a carrier substrate in an inverted, or flip-chip, fashion, which conserves real estate on the carrier substrate. It is also known in the art to connect a chip-scale package to a carrier substrate by way of wire bonds or other conductive elements. Such assemblies, packages and interposers are disclosed, for example, in U.S. Pat. No. 5,719,440, issued to Walter L. Moden and assigned to the assignee of the invention disclosed and claimed herein.
The introduction of underfill materials between a semiconductor die and an interposer secured thereto is somewhat undesirable since an additional assembly step is required. Moreover, as conventional underfill materials flow into the spaces between a semiconductor die and an interposer, voids or bubbles may form and remain therein.
In addition, the use of glob-top type encapsulants to protect the bond pads and intermediate conductive elements of such chip-scale packages is somewhat undesirable since glob-top encapsulants may flow laterally over the second contact pads or conductive structures protruding therefrom. While more viscous encapsulant materials may be used, because viscous glob-top encapsulants typically cure with a convex surface, the amount of encapsulant needed to adequately protect the bond wires or other intermediate conductive elements between the bond pads and first contact pads may result in a glob-top that protrudes an undesirable distance from the interposer, which may require the removal of some of the convex portion of the glob-top or the use of undesirably long conductive elements between the second contact pads of the interposer and the contact pads of the carrier substrate.
U.S. Pat. No. 5,714,800, issued to Patrick F. Thompson, discloses an interposer with a stepped outer periphery. The first contact pads are located on the lower, peripheral portion of the interposer, while the second contact pads are positioned on the higher, central region of the interposer. The vertical wall between the lower and higher regions of the interposer prevents liquid encapsulant material from flowing laterally beyond the lower portion of the interposer and thus prevents the liquid encapsulant material from flowing onto the second contact pads. As the lower, peripheral portion of the interposer must have a sufficient thickness and rigidity to support the first contact pads thereon and since the difference in height between the peripheral and central regions of the interposer should be sufficient to facilitate complete encapsulation of an intermediate conductive element, such as a bond wire, that is connected to and raised somewhat above a first contact pad, the stepped interposer is relatively thick and undesirably adds to the overall thickness of a semiconductor device package of which it is a part. Moreover, fabrication of the stepped interposer requires additional machining or alignment of layers to create a stepped periphery. In addition, when an interposer with a stepped periphery is used, since the intermediate conductive elements and bond pads are located near the periphery of the semiconductor die-interposer assembly, it would by very difficult to encapsulate bond pads and intermediate conductive elements with a glob-top type encapsulant.
Accordingly, there is a need for a structure on an interposer that prevents the lateral flow of glob-top type encapsulant materials. There is also a need for a structure that contains relatively low viscosity encapsulant materials over desired areas of an interposer.
In the past decade, a manufacturing technique termed xe2x80x9cstereolithographyxe2x80x9d, also known as xe2x80x9clayered manufacturingxe2x80x9d, has evolved to a degree where it is employed in many industries.
Essentially, stereolithography as conventionally practiced involves utilizing a computer to generate a three-dimensional (3-D) mathematical simulation or model of an object to be fabricated, such generation usually effected with 3-D computer-aided design (CAD) software. The model or simulation is mathematically separated or xe2x80x9cslicedxe2x80x9d into a large number of relatively thin, parallel, usually vertically superimposed layers, each layer having defined boundaries and other features associated with the model (and thus the actual object to be fabricated) at the level of that layer within the exterior boundaries of the object. A complete assembly or stack of all of the layers defines the entire object, and surface resolution of the object is, in part, dependent upon the thickness of the layers.
The mathematical simulation or model is then employed to generate an actual object by building the object, layer by superimposed layer. A wide variety of approaches to stereolithography by different companies has resulted in techniques for fabrication of objects from both metallic and non-metallic materials. Regardless of the material employed to fabricate an object, stereolithographic techniques usually involve disposition of a layer of unconsolidated or unfixed material corresponding to each layer within the object boundaries, followed by selective consolidation or fixation of the material to at least a partially consolidated, or semisolid, state in those areas of a given layer corresponding to portions of the object, the consolidated or fixed material also at that time being substantially concurrently bonded to a lower layer of the object to be fabricated. The unconsolidated material employed to build an object may be supplied in particulate or liquid form, and the material itself may be consolidated or fixed, or a separate binder material may be employed to bond material particles to one another and to those of a previously formed layer. In some instances, thin sheets of material may be superimposed to build an object, each sheet being fixed to a next lower sheet and unwanted portions of each sheet removed, a stack of such sheets defining the completed object. When particulate materials are employed, resolution of object surfaces is highly dependent upon particle size, whereas when a liquid is employed, surface resolution is highly dependent upon the minimum surface area of the liquid which can be fixed and the minimum thickness of a layer that can be generated. Of course, in either case, resolution and accuracy of object reproduction from the CAD file is also dependent upon the ability of the apparatus used to fix the material to precisely track the mathematical instructions indicating solid areas and boundaries for each layer of material. Toward that end, and depending upon the layer being fixed, various fixation approaches have been employed, including particle bombardment (electron beams), disposing a binder or other fixative (such as by ink-jet printing techniques), or irradiation using heat or specific wavelength ranges.
An early application of stereolithography was to enable rapid fabrication of molds and prototypes of objects from CAD files. Thus, either male or female forms on which mold material might be disposed may be rapidly generated. Prototypes of objects might be built to verify the accuracy of the CAD file defining the object and to detect any design deficiencies and possible fabrication problems before a design was committed to large-scale production.
In more recent years, stereolithography has been employed to develop and refine object designs in relatively inexpensive materials, and has also been used to fabricate small quantities of objects where the cost of conventional fabrication techniques is prohibitive for same, such as in the case of plastic objects conventionally formed by injection molding. It is also known to employ stereolithography in the custom fabrication of products generally built in small quantities or where a product design is rendered only once. Finally, it has been appreciated in some industries that stereolithography provides a capability to fabricate products, such as those including closed interior chambers or convoluted passageways, which cannot be fabricated satisfactorily using conventional manufacturing techniques. It has also been recognized in some industries that a stereolithographic object or component may be formed or built around another, pre-existing object or component to create a larger product.
However, to the inventor""s knowledge, stereolithography has yet to be applied to mass production of articles in volumes of thousands or millions, or employed to produce, augment or enhance products including other, pre-existing components in large quantities, where minute component sizes are involved, and where extremely high resolution and a high degree of reproducibility of results are required. In particular, the inventor is not aware of the use of stereolithography to fabricate structures for preventing the lateral flow of encapsulant materials beyond desired areas of interposers or other substrates. Furthermore, conventional stereolithography apparatus and methods fail to address the difficulties of precisely locating and orienting a number of pre-existing components for stereolithographic application of material thereto without the use of mechanical alignment techniques or to otherwise assuring precise, repeatable placement of components.
The present invention includes a dam for use on an interposer. When secured to a surface of an interposer, the dam is configured to protrude above the surface so as to prevent an encapsulant material from flowing laterally beyond a desired area of the interposer. The present invention also includes interposers with one or more such upwardly protruding dams positioned thereon, as well as semiconductor device assemblies and packages including interposers with one or more upwardly protruding dams thereon.
Each upwardly protruding dam according to the present invention is configured to be secured to a surface of an interposer. The upwardly protruding dams may be configured to fully or partially surround an area of an interposer over which an encapsulant material is to be disposed. The upwardly protruding dams are configured to at least partially laterally confine a quantity of encapsulant material over at least a portion of the surface of the interposer. The upwardly protruding dams of the present invention may be fabricated by any known substrate or semiconductor device component fabrication process. Preferably, upwardly protruding dams incorporating teachings of the present invention are fabricated from a photocurable polymer, or xe2x80x9cphotopolymerxe2x80x9d, by way of known stereolithography processes, such as the hereinafter more fully described stereolithography process. Each upwardly protruding dam may include one layer or a plurality of superimposed, contiguous, mutually adhered layers of material. An upwardly protruding dam according to the present invention may be fabricated directly on an interposer or separately therefrom, then secured thereto by known techniques, such as the use of an adhesive material.
An interposer according to the present invention may include one or more slots or apertures formed completely therethrough. In one embodiment of the interposer, an elongate, substantially centrally located slot facilitates the formation of electrical connections from the bond pads of a semiconductor die with one or more substantially centrally located rows of bond pads to corresponding first contact pads located near the slot of the interposer. Electrical traces carried by the interposer connect each first contact pad to a corresponding second contact pad on an upper surface of the interposer opposite from the semiconductor die. The second contact pads are disposed in an array over the surface of the interposer. The upwardly protruding dam at least partially laterally surrounds the slot and at least the first contact pads of the interposer and, preferably, substantially completely laterally surrounds the slot and first contact pads.
The interposer may be assembled with a semiconductor die by placing one or more dielectric, adhesive strips between the active surface of the semiconductor die and a lower surface of the interposer. The dielectric, adhesive strips at least partially laterally surround the bond pads on the active surface of the semiconductor die, as well as impart stability to the assembly. The bond pads of the semiconductor die may be electrically connected to the corresponding first contact pads of the interposer by way of known intermediate conductive elements, such as wire bonds, that extend through the one or more slots or apertures of the interposer.
In a semiconductor device package incorporating teachings of the present invention, a quantity of encapsulant material may be disposed over the one or more slots or apertures so as to electrically insulate each of the intermediate conductive elements extending therethrough. The one or more dams protruding upwardly from the upper surface of the interposer at least partially laterally confine the encapsulant material, preventing the encapsulant material from flowing laterally beyond the one or more dams. If the upwardly protruding dam substantially laterally surrounds the one or more slots and second contact pads, a low viscosity encapsulant material may be employed, facilitating the formation of a xe2x80x9cglob-topxe2x80x9d with a less convex, or even no, meniscus. When the interposer includes such an upwardly protruding dam and a low viscosity encapsulant material is used, the encapsulated mass may actually have a substantially planar surface, reducing the overall thickness of the semiconductor device package.
A semiconductor device package incorporating teachings of the present invention may also include a sealing element between the interposer and the semiconductor die. The sealing element substantially laterally surrounds the bond pads of the semiconductor die and may be at least partially formed by the one or more adhesive strips securing the interposer to the active surface of the semiconductor die. The sealing element may also include a sealing material, such as a photopolymer, disposed between the interposer and semiconductor die. When a photopolymer is used to form at least a portion of the sealing element, the hereinafter more fully described stereolithography processes may be used to at least partially consolidate the photopolymer. A photopolymer portion of the sealing element may be located at or adjacent an outer periphery of one or both of the interposer and semiconductor die or adjacent a periphery of the slot formed through the interposer.
According to another aspect, the present invention includes a method for fabricating the dam, as well as a method for fabricating all or part of a sealing element from a photopolymer. In a preferred embodiment of the method, a computer-controlled, 3-D CAD initiated process known as xe2x80x9cstereolithographyxe2x80x9d or xe2x80x9clayered manufacturingxe2x80x9d is used to fabricate the dam or sealing element. When stereolithographic processes are employed, each dam is formed as either a single layer or a series of superimposed, contiguous, mutually adhered layers of material.
The stereolithographic method of fabricating the dams or sealing elements of the present invention preferably includes the use of a machine vision system to locate the interposers or other substrates on which the dams are to be fabricated, as well as the features or other components on or associated with the interposers or other substrates (e.g., solder bumps, contact pads, conductive traces, etc.). The use of a machine vision system directs the alignment of a stereolithography system with each interposer or other substrate for material disposition purposes. Accordingly, the interposers or other substrates need not be precisely mechanically aligned with any component of the stereolithography system to practice the stereolithographic embodiment of the method of the present invention.
In a preferred embodiment, the dams to be fabricated upon or positioned upon and secured to interposers in accordance with the invention are fabricated using precisely focused electromagnetic radiation in the form of an ultraviolet (UV) wavelength laser under control of a computer and responsive to input from a machine vision system, such as a pattern recognition system, to fix or cure selected regions of a layer of a liquid photopolymer material disposed on the semiconductor device or other substrate.
Sealing elements may be stereolithographically fabricated on an assembly including a semiconductor die and an interposer positioned on the active surface thereof.
Other features and advantages of the present invention will become apparent to those of ordinary skill in the art through consideration of the ensuing description, the accompanying drawings, and the appended claims.